This invention relates in general to liquid crystal displays (LCDs) and, in particular, to a low power driving scheme for LCDs.
FIG. 1 is a schematic view of a LCD panel and its n row electrodes labeled COM 1, . . . COM n in FIG. 1, and k column electrodes shown as vertical rectangles labeled SEG 1˜SEGk in FIG. 1. Not shown in FIG. 1 (to simplify the figure) is a layer of liquid crystal material between the row and column electrodes. Each row electrode will overlap a column electrode when viewed in a viewing direction, where the overlapping portion of the two overlapping electrodes will define a pixel of the LCD panel. When an appropriate voltage is applied across a particular row and a particular column electrode, a portion of the liquid crystal layer at the pixel between the overlapping row and column electrodes controls the light transmission or reflective properties of such portion.
FIG. 2a is a graphical illustration of the Improved Alto-Pleshko (IAPT) waveform for the row (or COM) electrodes and column (or SEG) electrodes. FIG. 2b is a graphical plot of the conventional Alto-Pleshko driving waveform for row (COM) and column (SEG) electrodes. In FIGS. 2a and 2b, voltages labeled VCOM or variations thereof indicate voltage waveforms that are applied to the row electrodes and voltages labeled VSEG or variations thereof indicate voltage waveforms applied to column electrodes. The driving waveforms in FIGS. 2a and 2b are conventional. Referring to FIG. 1 and FIG. 2a, a typical configuration of passive LCD and a conventional driving waveform is illustrated. As demonstrated in FIG. 1, the ith row electrode is connected to a node at voltage VCOMi, on one side, and the jth column electrode is connected to a node at voltage VSEGj on the other side. In FIG. 2a, where vertical axis is voltage, and the horizontal axis time, the data signals VSEGj are also drawn as overlapped shaded region over VCOMi signal to illustrate relative relationships between these two sets of signals.
The driving waveform demonstrated in FIG. 2a, is known as Improved Alto-Pleshko driving method (Improved APT, or IAPT for brief). The main characteristic is that the COM scanning pulses are “folded” such that the driving total voltage dynamic range is reduced as compared to the plain APT, as show in FIG. 2b. This reduced voltage range is considered to be advantageous in the conventional design technique used in CMOS integrated driver IC, where low MOS transistor break down voltage (caused by thin gate oxide used in fine gate geometry circuits and devices) would otherwise make the circuit design very difficult.
From the waveform of these signals it is observed that although the IAPT driving method reduces the voltage dynamic range for the drivers, but the power is increased as a consequence. This is because the LCD is a pure AC device and the capacitive load on column (SEG) electrodes can be quite significant. However, the current driving the column (SEG) electrodes also need to flow through the entire voltage range, although the column (SEG) electrode voltage swing, V6–V4, or V3–V1 as shown in FIG. 2a (these two value needs to be the same), as measured from “majority” COM electrode voltage (which is substantially the same as the non-scanning voltage V5 in Field 2×N and V2 in Field 2×N+1) is far smaller than the total supply voltage used in a conventional IAPT driving scheme (V6–V1 in FIG. 2a.).
According to conventional design principal, the ratio between (V6–V1) and (V3–V1) can be estimated roughly by
                    Mux        +        1            2        ,where Mux is the multiplexing rate (or duty factor), which is determined by the number of row/COM electrodes. Using this formula, for a moderate sized LCD of 81 rows (with 81 row/COM electrodes), the above ratio is 5×, and therefore, the power wasted for driving SEG electrodes (which is proportional to voltage V, assuming current I stays unchanged) can be as high as 80%.
As there will be only one COM electrode scanning while all SEG electrodes can change at each row scanning period, SEG/column electrode capacitive loading current can be more than ten times higher than COM/row electrode loading current. This obviously makes the low utilization of supplied SEG/column power very undesirable.
One of the most frequently heard complaints from users of portable computers, cellular phones and personal digital assistants is that these devices consume too much power so that one has to constantly change batteries, which is inconvenient. It is, therefore, desirable to provide a power saving scheme for driving LCD displays, especially for displays used in such portable devices.
Another problem encountered in conventional LCD is crosstalk caused by its driving circuit design. Many passive LCD devices are driven by means of Class B bias circuits. In such circuits, to minimize power consumption, both N and P transistors are in the OFF state when the output of the circuit is not used to drive electrodes. Therefore, when the Class B bias circuit is used to drive the column electrodes to target voltage values, as the electrical potential of the driven electrode approaches the target value, the output error is small so that the output stage of conventional operational amplifier driver circuits moves towards Class B bias, where both N and P type transistors are in the OFF state and there is therefore very weak driving power. This causes the driver circuit to be in high impedance state due to the high RC value of the load driven by the drive circuit. Therefore, the residual error (the difference between the voltage across the row and column electrodes at the pixel addressed and the target value) tends to persist for a long time through a number of row-scanning cycles, thereby causing crosstalk. In this context, a row scanning cycle is the time period taken for applying electrical potentials to cause pixels overlapping a row electrode to have the opportunity to change state.
It is therefore desirable to provide an improved LCD driving scheme where the above-described crosstalk problem is reduced or minimized.